NVIDIA is deploying its Vera CPU across internal electronic design automation workflows to speed up the development of its next generation of CPUs and GPUs. The company announced it is collaborating with Cadence and Synopsys to optimize critical engineering applications for the processor.
Early testing on production-class workloads showed up to 1.5x higher performance for both Cadence Jasper and Synopsys VCS applications on selected tasks. Synopsys VCS used the same number of cores in the comparison test.
Workflow Performance
Semiconductor engineering teams spend years validating designs at the register-transfer level before moving products toward manufacturing. While GPUs and AI models accelerate specific parts of chip design, core tasks such as formal verification and logic simulation remain reliant on single-core speed, low latency and high memory bandwidth.
The Vera hardware configuration pairs 88 custom NVIDIA Olympus CPU cores with an LPDDR5X memory subsystem and the second-generation NVIDIA Scalable Coherent Fabric. NVIDIA said the architecture is built to manage latency-sensitive jobs alongside large-scale regression testing across compute farms.
Beyond early benchmark results, the company reported ongoing work with Cadence and Synopsys on application profiling and system-level software tuning.
Future Roadmap
Looking ahead, NVIDIA plans to follow the Vera CPU with its next-generation Rosa CPU, powered by the NVIDIA Rigel core. The company will also present details at DAC 2026.
