NVIDIA expanded its NVLink Fusion platform with NVHBM, a custom high-bandwidth memory architecture for semi-custom processors, the company announced.
The technology integrates NVIDIA's custom memory controller directly into the high-bandwidth memory base die. Traditional architectures place the memory controller on the main processor die, consuming silicon area that could otherwise run compute workloads. NVIDIA said NVHBM relies on the same base technology planned for its future graphics processing units.
Compared with standard HBM4E memory, NVHBM delivers up to 30 percent higher memory bandwidth and reduces memory power consumption by 15 percent, according to NVIDIA. Moving the controller into the 3D memory stack also frees up to 25 percent more silicon area on the host compute die. NVIDIA is standardizing the design so multiple memory partners can validate and supply the hardware.
Amazon’s Annapurna Labs will be the first partner to work on NVHBM. Annapurna Labs plans to support NVLink Fusion starting with its upcoming Trainium4 processors, allowing Amazon's custom chips and NVIDIA graphics processors to operate together across a common rack-scale system.
“NVHBM represents a new architectural approach to advancing high-bandwidth memory performance and efficiency,” said Nafea Bshara, vice president of Annapurna Labs at Amazon. “We look forward to this technology collaboration to benefit future AWS infrastructure designs.”
NVLink Fusion gives hardware partners access to NVLink chiplets, NVLink-C2C interconnects, NVLink switches, and NVIDIA MGX system racks. The platform connects custom processor developers with a broader network of central processing unit suppliers, ASIC designers, and server manufacturers.
